728 lines
31 KiB
C
Executable File
728 lines
31 KiB
C
Executable File
/*
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* Copyright (c) 2004 Christiaan Simons <cc_simons@yahoo.com>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef ST10F269_H
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#define ST10F269_H
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/*
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v0.2 23/09/04
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Hardware register access for the ST st10f269 device.
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These declarations are to be used with the vbcc(c16x) compiler.
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There may be an error in the user manual (v1.2).
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T8IC and PWMIC were located at the same 8 bit esfr address (0xBF).
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Moved T7IC and T8IC to 0xBD and 0xBE.
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The MACTRP flag (page 67) in the TFR and IDX0 and IDX1 were
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missing in the expected places (silently adding these bits).
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@todo reviewing and testing
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*/
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#define RTCCON (*((volatile unsigned int*)0x0EC00))
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#define RTCPL (*((volatile unsigned int*)0xEC06))
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#define RTCPH (*((volatile unsigned int*)0xEC08))
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#define RTCDL (*((volatile unsigned int*)0xEC0A))
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#define RTCDH (*((volatile unsigned int*)0xEC0C))
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#define RTCL (*((volatile unsigned int*)0xEC0E))
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#define RTCH (*((volatile unsigned int*)0xEC10))
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#define RTCAL (*((volatile unsigned int*)0xEC12))
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#define RTCAH (*((volatile unsigned int*)0xEC14))
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#define CAN2CSR (*((volatile unsigned int*)0xEE00))
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#define CAN2IR (*((volatile unsigned int*)0xEE02))
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#define CAN2BTR (*((volatile unsigned int*)0xEE04))
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#define CAN2GMS (*((volatile unsigned int*)0xEE06))
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#define CAN2UGML (*((volatile unsigned int*)0xEE08))
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#define CAN2LGML (*((volatile unsigned int*)0xEE0A))
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#define CAN2UMLM (*((volatile unsigned int*)0xEE0C))
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#define CAN2LMLM (*((volatile unsigned int*)0xEE0E))
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#define CAN2MCR1 (*((volatile unsigned int*)0xEE10))
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#define CAN2MO1 (*((volatile unsigned int*)0xEE10))
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#define CAN2UAR1 (*((volatile unsigned int*)0xEE12))
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#define CAN2LAR1 (*((volatile unsigned int*)0xEE14))
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#define CAN2MCR2 (*((volatile unsigned int*)0xEE20))
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#define CAN2MO2 (*((volatile unsigned int*)0xEE20))
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#define CAN2UAR2 (*((volatile unsigned int*)0xEE22))
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#define CAN2LAR2 (*((volatile unsigned int*)0xEE24))
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#define CAN2MCR3 (*((volatile unsigned int*)0xEE30))
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#define CAN2MO3 (*((volatile unsigned int*)0xEE30))
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#define CAN2UAR3 (*((volatile unsigned int*)0xEE32))
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#define CAN2LAR3 (*((volatile unsigned int*)0xEE34))
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#define CAN2MCR4 (*((volatile unsigned int*)0xEE40))
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#define CAN2MO4 (*((volatile unsigned int*)0xEE40))
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#define CAN2UAR4 (*((volatile unsigned int*)0xEE42))
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#define CAN2LAR4 (*((volatile unsigned int*)0xEE44))
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#define CAN2MCR5 (*((volatile unsigned int*)0xEE50))
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#define CAN2MO5 (*((volatile unsigned int*)0xEE50))
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#define CAN2UAR5 (*((volatile unsigned int*)0xEE52))
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#define CAN2LAR5 (*((volatile unsigned int*)0xEE54))
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#define CAN2MCR6 (*((volatile unsigned int*)0xEE60))
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#define CAN2MO6 (*((volatile unsigned int*)0xEE60))
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#define CAN2UAR6 (*((volatile unsigned int*)0xEE62))
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#define CAN2LAR6 (*((volatile unsigned int*)0xEE64))
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#define CAN2MCR7 (*((volatile unsigned int*)0xEE70))
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#define CAN2MO7 (*((volatile unsigned int*)0xEE70))
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#define CAN2UAR7 (*((volatile unsigned int*)0xEE72))
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#define CAN2LAR7 (*((volatile unsigned int*)0xEE74))
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#define CAN2MCR8 (*((volatile unsigned int*)0xEE80))
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#define CAN2MO8 (*((volatile unsigned int*)0xEE80))
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#define CAN2UAR8 (*((volatile unsigned int*)0xEE82))
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#define CAN2LAR8 (*((volatile unsigned int*)0xEE84))
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#define CAN2MCR9 (*((volatile unsigned int*)0xEE90))
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#define CAN2MO9 (*((volatile unsigned int*)0xEE90))
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#define CAN2UAR9 (*((volatile unsigned int*)0xEE92))
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#define CAN2LAR9 (*((volatile unsigned int*)0xEE94))
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#define CAN2MCR10 (*((volatile unsigned int*)0xEEA0))
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#define CAN2MO10 (*((volatile unsigned int*)0xEEA0))
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#define CAN2UAR10 (*((volatile unsigned int*)0xEEA2))
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#define CAN2LAR10 (*((volatile unsigned int*)0xEEA4))
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#define CAN2MCR11 (*((volatile unsigned int*)0xEEB0))
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#define CAN2MO11 (*((volatile unsigned int*)0xEEB0))
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#define CAN2UAR11 (*((volatile unsigned int*)0xEEB2))
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#define CAN2LAR11 (*((volatile unsigned int*)0xEEB4))
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#define CAN2MCR12 (*((volatile unsigned int*)0xEEC0))
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#define CAN2MO12 (*((volatile unsigned int*)0xEEC0))
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#define CAN2UAR12 (*((volatile unsigned int*)0xEEC2))
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#define CAN2LAR12 (*((volatile unsigned int*)0xEEC4))
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#define CAN2MCR13 (*((volatile unsigned int*)0xEED0))
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#define CAN2MO13 (*((volatile unsigned int*)0xEED0))
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#define CAN2UAR13 (*((volatile unsigned int*)0xEED2))
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#define CAN2LAR13 (*((volatile unsigned int*)0xEED4))
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#define CAN2MCR14 (*((volatile unsigned int*)0xEEE0))
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#define CAN2MO14 (*((volatile unsigned int*)0xEEE0))
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#define CAN2UAR14 (*((volatile unsigned int*)0xEEE2))
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#define CAN2LAR14 (*((volatile unsigned int*)0xEEE4))
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#define CAN2MCR15 (*((volatile unsigned int*)0xEEF0))
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#define CAN2MO15 (*((volatile unsigned int*)0xEEF0))
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#define CAN2UAR15 (*((volatile unsigned int*)0xEEF2))
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#define CAN2LAR15 (*((volatile unsigned int*)0xEEF4))
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#define CAN1CSR (*((volatile unsigned int*)0xEF00))
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#define CAN1IR (*((volatile unsigned int*)0xEF02))
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#define CAN1BTR (*((volatile unsigned int*)0xEF04))
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#define CAN1GMS (*((volatile unsigned int*)0xEF06))
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#define CAN1UGML (*((volatile unsigned int*)0xEF08))
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#define CAN1LGML (*((volatile unsigned int*)0xEF0A))
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#define CAN1UMLM (*((volatile unsigned int*)0xEF0C))
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#define CAN1LMLM (*((volatile unsigned int*)0xEF0E))
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#define CAN1MCR1 (*((volatile unsigned int*)0xEF10))
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#define CAN1MO1 (*((volatile unsigned int*)0xEF10))
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#define CAN1UAR1 (*((volatile unsigned int*)0xEF12))
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#define CAN1LAR1 (*((volatile unsigned int*)0xEF14))
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#define CAN1MCR2 (*((volatile unsigned int*)0xEF20))
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#define CAN1MO2 (*((volatile unsigned int*)0xEF20))
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#define CAN1UAR2 (*((volatile unsigned int*)0xEF22))
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#define CAN1LAR2 (*((volatile unsigned int*)0xEF24))
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#define CAN1MCR3 (*((volatile unsigned int*)0xEF30))
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#define CAN1MO3 (*((volatile unsigned int*)0xEF30))
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#define CAN1UAR3 (*((volatile unsigned int*)0xEF32))
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#define CAN1LAR3 (*((volatile unsigned int*)0xEF34))
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#define CAN1MCR4 (*((volatile unsigned int*)0xEF40))
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#define CAN1MO4 (*((volatile unsigned int*)0xEF40))
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#define CAN1UAR4 (*((volatile unsigned int*)0xEF42))
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#define CAN1LAR4 (*((volatile unsigned int*)0xEF44))
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#define CAN1MCR5 (*((volatile unsigned int*)0xEF50))
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#define CAN1MO5 (*((volatile unsigned int*)0xEF50))
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#define CAN1UAR5 (*((volatile unsigned int*)0xEF52))
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#define CAN1LAR5 (*((volatile unsigned int*)0xEF54))
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#define CAN1MCR6 (*((volatile unsigned int*)0xEF60))
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#define CAN1MO6 (*((volatile unsigned int*)0xEF60))
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#define CAN1UAR6 (*((volatile unsigned int*)0xEF62))
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#define CAN1LAR6 (*((volatile unsigned int*)0xEF64))
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#define CAN1MCR7 (*((volatile unsigned int*)0xEF70))
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#define CAN1MO7 (*((volatile unsigned int*)0xEF70))
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#define CAN1UAR7 (*((volatile unsigned int*)0xEF72))
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#define CAN1LAR7 (*((volatile unsigned int*)0xEF74))
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#define CAN1MCR8 (*((volatile unsigned int*)0xEF80))
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#define CAN1MO8 (*((volatile unsigned int*)0xEF80))
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#define CAN1UAR8 (*((volatile unsigned int*)0xEF82))
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#define CAN1LAR8 (*((volatile unsigned int*)0xEF84))
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#define CAN1MCR9 (*((volatile unsigned int*)0xEF90))
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#define CAN1MO9 (*((volatile unsigned int*)0xEF90))
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#define CAN1UAR9 (*((volatile unsigned int*)0xEF92))
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#define CAN1LAR9 (*((volatile unsigned int*)0xEF94))
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#define CAN1MCR10 (*((volatile unsigned int*)0xEFA0))
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#define CAN1MO10 (*((volatile unsigned int*)0xEFA0))
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#define CAN1UAR10 (*((volatile unsigned int*)0xEFA2))
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#define CAN1LAR10 (*((volatile unsigned int*)0xEFA4))
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#define CAN1MCR11 (*((volatile unsigned int*)0xEFB0))
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#define CAN1MO11 (*((volatile unsigned int*)0xEFB0))
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#define CAN1UAR11 (*((volatile unsigned int*)0xEFB2))
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#define CAN1LAR11 (*((volatile unsigned int*)0xEFB4))
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#define CAN1MCR12 (*((volatile unsigned int*)0xEFC0))
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#define CAN1MO12 (*((volatile unsigned int*)0xEFC0))
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#define CAN1UAR12 (*((volatile unsigned int*)0xEFC2))
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#define CAN1LAR12 (*((volatile unsigned int*)0xEFC4))
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#define CAN1MCR13 (*((volatile unsigned int*)0xEFD0))
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#define CAN1MO13 (*((volatile unsigned int*)0xEFD0))
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#define CAN1UAR13 (*((volatile unsigned int*)0xEFD2))
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#define CAN1LAR13 (*((volatile unsigned int*)0xEFD4))
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#define CAN1MCR14 (*((volatile unsigned int*)0xEFE0))
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#define CAN1MO14 (*((volatile unsigned int*)0xEFE0))
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#define CAN1UAR14 (*((volatile unsigned int*)0xEFE2))
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#define CAN1LAR14 (*((volatile unsigned int*)0xEFE4))
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#define CAN1MCR15 (*((volatile unsigned int*)0xEFF0))
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#define CAN1MO15 (*((volatile unsigned int*)0xEFF0))
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#define CAN1UAR15 (*((volatile unsigned int*)0xEFF2))
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#define CAN1LAR15 (*((volatile unsigned int*)0xEFF4))
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#define SRCP0 (*((volatile unsigned int*)0xFCE0))
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#define DSTP0 (*((volatile unsigned int*)0xFCE2))
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#define SRCP1 (*((volatile unsigned int*)0xFCE4))
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#define DSTP1 (*((volatile unsigned int*)0xFCE6))
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#define SRCP2 (*((volatile unsigned int*)0xFCE8))
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#define DSTP2 (*((volatile unsigned int*)0xFCEA))
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#define SRCP3 (*((volatile unsigned int*)0xFCEC))
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#define DSTP3 (*((volatile unsigned int*)0xFCEE))
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#define SRCP4 (*((volatile unsigned int*)0xFCF0))
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#define DSTP4 (*((volatile unsigned int*)0xFCF2))
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#define SRCP5 (*((volatile unsigned int*)0xFCF4))
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#define DSTP5 (*((volatile unsigned int*)0xFCF6))
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#define SRCP6 (*((volatile unsigned int*)0xFCF8))
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#define DSTP6 (*((volatile unsigned int*)0xFCFA))
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#define SRCP7 (*((volatile unsigned int*)0xFCFC))
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#define DSTP7 (*((volatile unsigned int*)0xFCFE))
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__esfr(0x00) volatile unsigned int QX0;
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__esfr(0x01) volatile unsigned int QX1;
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__esfr(0x02) volatile unsigned int QR0;
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__esfr(0x03) volatile unsigned int QR1;
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__esfr(0x12) volatile unsigned int XPERCON;
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__esfrbit(0x12,0x00) volatile __bit CAN1EN;
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__esfrbit(0x12,0x01) volatile __bit CAN2EN;
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__esfrbit(0x12,0x02) volatile __bit XRAM1EN;
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__esfrbit(0x12,0x03) volatile __bit XRAM2EN;
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__esfrbit(0x12,0x04) volatile __bit RTCEN;
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__esfr(0x18) volatile unsigned int PT0;
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__esfr(0x19) volatile unsigned int PT1;
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__esfr(0x1A) volatile unsigned int PT2;
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__esfr(0x1B) volatile unsigned int PT3;
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__esfr(0x1C) volatile unsigned int PP0;
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__esfr(0x1D) volatile unsigned int PP1;
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__esfr(0x1E) volatile unsigned int PP2;
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__esfr(0x1F) volatile unsigned int PP3;
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__esfr(0x28) volatile unsigned int T7;
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__esfr(0x29) volatile unsigned int T8;
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__esfr(0x2A) volatile unsigned int T7REL;
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__esfr(0x2B) volatile unsigned int T8REL;
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__esfr(0x3C) volatile unsigned int IDPROG;
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__esfr(0x3D) volatile unsigned int IDMEM;
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__esfr(0x3E) volatile unsigned int IDCHIP;
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__esfr(0x3F) volatile unsigned int IDMANUF;
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__esfr(0x40) volatile unsigned int POCON0L;
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__esfr(0x41) volatile unsigned int POCON0H;
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__esfr(0x42) volatile unsigned int POCON1L;
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__esfr(0x43) volatile unsigned int POCON1H;
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__esfr(0x44) volatile unsigned int POCON2;
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__esfr(0x45) volatile unsigned int POCON3;
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__esfr(0x46) volatile unsigned int POCON4;
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__esfr(0x47) volatile unsigned int POCON6;
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__esfr(0x48) volatile unsigned int POCON7;
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__esfr(0x49) volatile unsigned int POCON8;
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__esfr(0x50) volatile unsigned int ADDAT2;
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__esfr(0x55) volatile unsigned int POCON20;
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__esfr(0x58) volatile unsigned int SSCTB;
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__esfr(0x59) volatile unsigned int SSCRB;
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__esfr(0x5A) volatile unsigned int SSCBR;
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__esfr(0x80) volatile unsigned int DP0L;
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__esfr(0x81) volatile unsigned int DP0H;
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__esfr(0x82) volatile unsigned int DP1L;
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__esfr(0x83) volatile unsigned int DP1H;
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__esfr(0x84) volatile unsigned int RP0H;
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__esfr(0xB0) volatile unsigned int CC16IC;
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__esfrbit(0xB0,0x06) volatile __bit CC16IE;
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__esfrbit(0xB0,0x07) volatile __bit CC16IR;
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__esfr(0xB1) volatile unsigned int CC17IC;
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__esfrbit(0xB1,0x06) volatile __bit CC17IE;
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__esfrbit(0xB1,0x07) volatile __bit CC17IR;
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__esfr(0xB2) volatile unsigned int CC18IC;
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__esfrbit(0xB2,0x06) volatile __bit CC18IE;
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__esfrbit(0xB2,0x07) volatile __bit CC18IR;
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__esfr(0xB3) volatile unsigned int CC19IC;
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__esfrbit(0xB3,0x06) volatile __bit CC19IE;
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__esfrbit(0xB3,0x07) volatile __bit CC19IR;
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__esfr(0xB4) volatile unsigned int CC20IC;
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__esfrbit(0xB4,0x06) volatile __bit CC20IE;
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__esfrbit(0xB4,0x07) volatile __bit CC20IR;
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__esfr(0xB5) volatile unsigned int CC21IC;
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__esfrbit(0xB5,0x06) volatile __bit CC21IE;
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__esfrbit(0xB5,0x07) volatile __bit CC21IR;
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__esfr(0xB6) volatile unsigned int CC22IC;
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__esfrbit(0xB6,0x06) volatile __bit CC22IE;
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__esfrbit(0xB6,0x07) volatile __bit CC22IR;
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__esfr(0xB7) volatile unsigned int CC23IC;
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__esfrbit(0xB7,0x06) volatile __bit CC23IE;
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__esfrbit(0xB7,0x07) volatile __bit CC23IR;
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__esfr(0xB8) volatile unsigned int CC24IC;
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__esfrbit(0xB8,0x06) volatile __bit CC24IE;
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__esfrbit(0xB8,0x07) volatile __bit CC24IR;
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__esfr(0xB9) volatile unsigned int CC25IC;
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__esfrbit(0xB9,0x06) volatile __bit CC25IE;
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__esfrbit(0xB9,0x07) volatile __bit CC25IR;
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__esfr(0xBA) volatile unsigned int CC26IC;
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__esfrbit(0xBA,0x06) volatile __bit CC26IE;
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__esfrbit(0xBA,0x07) volatile __bit CC26IR;
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__esfr(0xBB) volatile unsigned int CC27IC;
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__esfrbit(0xBB,0x06) volatile __bit CC27IE;
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__esfrbit(0xBB,0x07) volatile __bit CC27IR;
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__esfr(0xBC) volatile unsigned int CC28IC;
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__esfrbit(0xBC,0x06) volatile __bit CC28IE;
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__esfrbit(0xBC,0x07) volatile __bit CC28IR;
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__esfr(0xBD) volatile unsigned int T7IC;
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__esfrbit(0xBD,0x06) volatile __bit T7IE;
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__esfrbit(0xBD,0x07) volatile __bit T7IR;
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__esfr(0xBE) volatile unsigned int T8IC;
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__esfrbit(0xBE,0x06) volatile __bit T8IE;
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__esfrbit(0xBE,0x07) volatile __bit T8IR;
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__esfr(0xBF) volatile unsigned int PWMIC;
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__esfrbit(0xBF,0x06) volatile __bit PWMIE;
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__esfrbit(0xBF,0x07) volatile __bit PWMIR;
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__esfr(0xC2) volatile unsigned int CC29IC;
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__esfrbit(0xC2,0x06) volatile __bit CC29IE;
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__esfrbit(0xC2,0x07) volatile __bit CC29IR;
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__esfr(0xC3) volatile unsigned int XP0IC;
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__esfrbit(0xC3,0x06) volatile __bit XP0IE;
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__esfrbit(0xC3,0x07) volatile __bit XP0IR;
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__esfr(0xC6) volatile unsigned int CC30IC;
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__esfrbit(0xC6,0x06) volatile __bit CC30IE;
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__esfrbit(0xC6,0x07) volatile __bit CC30IR;
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__esfr(0xC7) volatile unsigned int XP1IC;
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__esfrbit(0xC7,0x06) volatile __bit XP1IE;
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__esfrbit(0xC7,0x07) volatile __bit XP1IR;
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__esfr(0xCA) volatile unsigned int CC31IC;
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__esfrbit(0xCA,0x06) volatile __bit CC31IE;
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__esfrbit(0xCA,0x07) volatile __bit CC31IR;
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__esfr(0xCB) volatile unsigned int XP2IC;
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__esfrbit(0xCB,0x06) volatile __bit XP2IE;
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__esfrbit(0xCB,0x07) volatile __bit XP2IR;
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__esfr(0xCE) volatile unsigned int S0TBIC;
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__esfrbit(0xCE,0x06) volatile __bit S0TBIE;
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__esfrbit(0xCE,0x07) volatile __bit S0TBIR;
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__esfr(0xCF) volatile unsigned int XP3IC;
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__esfrbit(0xCF,0x06) volatile __bit XP3IE;
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__esfrbit(0xCF,0x07) volatile __bit XP3IR;
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__esfr(0xE0) volatile unsigned int EXICON;
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__esfr(0xE1) volatile unsigned int ODP2;
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__esfr(0xE2) volatile unsigned int PICON;
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__esfrbit(0xE2,0x00) volatile __bit P2LIN;
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__esfrbit(0xE2,0x01) volatile __bit P2HIN;
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__esfrbit(0xE2,0x02) volatile __bit P3LIN;
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__esfrbit(0xE2,0x03) volatile __bit P3HIN;
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__esfrbit(0xE2,0x04) volatile __bit P4LIN;
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__esfrbit(0xE2,0x06) volatile __bit P7LIN;
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__esfrbit(0xE2,0x07) volatile __bit P8LIN;
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__esfr(0xE3) volatile unsigned int ODP3;
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__esfr(0xE5) volatile unsigned int ODP4;
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__esfr(0xE7) volatile unsigned int ODP6;
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__esfr(0xE9) volatile unsigned int ODP7;
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__esfr(0xEB) volatile unsigned int ODP8;
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__esfr(0xED) volatile unsigned int EXISEL;
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__sfr(0x00) volatile unsigned int DPP0;
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__sfr(0x01) volatile unsigned int DPP1;
|
|
__sfr(0x02) volatile unsigned int DPP2;
|
|
__sfr(0x03) volatile unsigned int DPP3;
|
|
__sfr(0x04) volatile unsigned int CSP;
|
|
__sfr(0x06) volatile unsigned int MDH;
|
|
__sfr(0x07) volatile unsigned int MDL;
|
|
__sfr(0x08) volatile unsigned int CP;
|
|
__sfr(0x09) volatile unsigned int SP;
|
|
__sfr(0x0A) volatile unsigned int STKOV;
|
|
__sfr(0x0B) volatile unsigned int STKUN;
|
|
__sfr(0x0C) volatile unsigned int ADDRSEL1;
|
|
__sfr(0x0D) volatile unsigned int ADDRSEL2;
|
|
__sfr(0x0E) volatile unsigned int ADDRSEL3;
|
|
__sfr(0x0F) volatile unsigned int ADDRSEL4;
|
|
__sfr(0x18) volatile unsigned int PW0;
|
|
__sfr(0x19) volatile unsigned int PW1;
|
|
__sfr(0x1A) volatile unsigned int PW2;
|
|
__sfr(0x1B) volatile unsigned int PW3;
|
|
__sfr(0x20) volatile unsigned int T2;
|
|
__sfr(0x21) volatile unsigned int T3;
|
|
__sfr(0x22) volatile unsigned int T4;
|
|
__sfr(0x23) volatile unsigned int T5;
|
|
__sfr(0x24) volatile unsigned int T6;
|
|
__sfr(0x25) volatile unsigned int CAPREL;
|
|
__sfr(0x28) volatile unsigned int T0;
|
|
__sfr(0x29) volatile unsigned int T1;
|
|
__sfr(0x2A) volatile unsigned int T0REL;
|
|
__sfr(0x2B) volatile unsigned int T1REL;
|
|
__sfr(0x2E) volatile unsigned int MAL;
|
|
__sfr(0x2F) volatile unsigned int MAH;
|
|
__sfr(0x30) volatile unsigned int CC16;
|
|
__sfr(0x31) volatile unsigned int CC17;
|
|
__sfr(0x32) volatile unsigned int CC18;
|
|
__sfr(0x33) volatile unsigned int CC19;
|
|
__sfr(0x34) volatile unsigned int CC20;
|
|
__sfr(0x35) volatile unsigned int CC21;
|
|
__sfr(0x36) volatile unsigned int CC22;
|
|
__sfr(0x37) volatile unsigned int CC23;
|
|
__sfr(0x38) volatile unsigned int CC24;
|
|
__sfr(0x39) volatile unsigned int CC25;
|
|
__sfr(0x3A) volatile unsigned int CC26;
|
|
__sfr(0x3B) volatile unsigned int CC27;
|
|
__sfr(0x3C) volatile unsigned int CC28;
|
|
__sfr(0x3D) volatile unsigned int CC29;
|
|
__sfr(0x3E) volatile unsigned int CC30;
|
|
__sfr(0x3F) volatile unsigned int CC31;
|
|
__sfr(0x40) volatile unsigned int CC0;
|
|
__sfr(0x41) volatile unsigned int CC1;
|
|
__sfr(0x42) volatile unsigned int CC2;
|
|
__sfr(0x43) volatile unsigned int CC3;
|
|
__sfr(0x44) volatile unsigned int CC4;
|
|
__sfr(0x45) volatile unsigned int CC5;
|
|
__sfr(0x46) volatile unsigned int CC6;
|
|
__sfr(0x47) volatile unsigned int CC7;
|
|
__sfr(0x48) volatile unsigned int CC8;
|
|
__sfr(0x49) volatile unsigned int CC9;
|
|
__sfr(0x4A) volatile unsigned int CC10;
|
|
__sfr(0x4B) volatile unsigned int CC11;
|
|
__sfr(0x4C) volatile unsigned int CC12;
|
|
__sfr(0x4D) volatile unsigned int CC13;
|
|
__sfr(0x4E) volatile unsigned int CC14;
|
|
__sfr(0x4F) volatile unsigned int CC15;
|
|
__sfr(0x50) volatile unsigned int ADDAT;
|
|
__sfr(0x57) volatile unsigned int WDT;
|
|
__sfr(0x58) volatile unsigned int S0TBUF;
|
|
__sfr(0x59) volatile unsigned int S0RBUF;
|
|
__sfr(0x5A) volatile unsigned int S0BG;
|
|
__sfr(0x60) volatile unsigned int PECC0;
|
|
__sfr(0x61) volatile unsigned int PECC1;
|
|
__sfr(0x62) volatile unsigned int PECC2;
|
|
__sfr(0x63) volatile unsigned int PECC3;
|
|
__sfr(0x64) volatile unsigned int PECC4;
|
|
__sfr(0x65) volatile unsigned int PECC5;
|
|
__sfr(0x66) volatile unsigned int PECC6;
|
|
__sfr(0x67) volatile unsigned int PECC7;
|
|
__sfr(0x80) volatile unsigned int P0L;
|
|
__sfr(0x81) volatile unsigned int P0H;
|
|
__sfr(0x82) volatile unsigned int P1L;
|
|
__sfr(0x83) volatile unsigned int P1H;
|
|
__sfr(0x84) volatile unsigned int IDX0;
|
|
__sfr(0x85) volatile unsigned int IDX1;
|
|
__sfr(0x86) volatile unsigned int BUSCON0;
|
|
__sfr(0x87) volatile unsigned int MDC;
|
|
__sfrbit(0x87,0x04) volatile __bit MDRIU;
|
|
__sfr(0x88) volatile unsigned int PSW;
|
|
__sfrbit(0x88,0x05) volatile __bit MULIP;
|
|
__sfrbit(0x88,0x06) volatile __bit USR0;
|
|
__sfrbit(0x88,0x0A) volatile __bit HLDEN;
|
|
__sfrbit(0x88,0x0B) volatile __bit IEN;
|
|
__sfr(0x89) volatile unsigned int SYSCON;
|
|
__sfrbit(0x89,0x00) volatile __bit XPERSHARE;
|
|
__sfrbit(0x89,0x01) volatile __bit VISIBLE;
|
|
__sfrbit(0x89,0x02) volatile __bit XPEN;
|
|
__sfrbit(0x89,0x03) volatile __bit BDRSTEN;
|
|
__sfrbit(0x89,0x04) volatile __bit OWDDIS;
|
|
__sfrbit(0x89,0x05) volatile __bit PWDCFG;
|
|
__sfrbit(0x89,0x06) volatile __bit CSCFG;
|
|
__sfrbit(0x89,0x07) volatile __bit WRCFG;
|
|
__sfrbit(0x89,0x08) volatile __bit CLKEN;
|
|
__sfrbit(0x89,0x09) volatile __bit BYTDIS;
|
|
__sfrbit(0x89,0x0A) volatile __bit ROMEN;
|
|
__sfrbit(0x89,0x0B) volatile __bit SGTDIS;
|
|
__sfrbit(0x89,0x0C) volatile __bit ROMS1;
|
|
__sfr(0x8A) volatile unsigned int BUSCON1;
|
|
__sfr(0x8B) volatile unsigned int BUSCON2;
|
|
__sfr(0x8C) volatile unsigned int BUSCON3;
|
|
__sfr(0x8D) volatile unsigned int BUSCON4;
|
|
__sfr(0x8E) volatile unsigned int ZEROS;
|
|
__sfr(0x8F) volatile unsigned int ONES;
|
|
__sfr(0x90) volatile unsigned int T78CON;
|
|
__sfrbit(0x90,0x03) volatile __bit T7M;
|
|
__sfrbit(0x90,0x06) volatile __bit T7R;
|
|
__sfrbit(0x90,0x0B) volatile __bit T8M;
|
|
__sfrbit(0x90,0x0E) volatile __bit T8R;
|
|
__sfr(0x91) volatile unsigned int CCM4;
|
|
__sfrbit(0x91,0x03) volatile __bit ACC16;
|
|
__sfrbit(0x91,0x07) volatile __bit ACC17;
|
|
__sfrbit(0x91,0x0B) volatile __bit ACC18;
|
|
__sfrbit(0x91,0x0F) volatile __bit ACC19;
|
|
__sfr(0x92) volatile unsigned int CCM5;
|
|
__sfrbit(0x92,0x03) volatile __bit ACC20;
|
|
__sfrbit(0x92,0x07) volatile __bit ACC21;
|
|
__sfrbit(0x92,0x0B) volatile __bit ACC22;
|
|
__sfrbit(0x92,0x0F) volatile __bit ACC23;
|
|
__sfr(0x93) volatile unsigned int CCM6;
|
|
__sfrbit(0x93,0x03) volatile __bit ACC24;
|
|
__sfrbit(0x93,0x07) volatile __bit ACC25;
|
|
__sfrbit(0x93,0x0B) volatile __bit ACC26;
|
|
__sfrbit(0x93,0x0F) volatile __bit ACC27;
|
|
__sfr(0x94) volatile unsigned int CCM7;
|
|
__sfrbit(0x94,0x03) volatile __bit ACC28;
|
|
__sfrbit(0x94,0x07) volatile __bit ACC29;
|
|
__sfrbit(0x94,0x0B) volatile __bit ACC30;
|
|
__sfrbit(0x94,0x0F) volatile __bit ACC31;
|
|
__sfr(0x98) volatile unsigned int PWMCON0;
|
|
__sfrbit(0x98,0x00) volatile __bit PTR0;
|
|
__sfrbit(0x98,0x01) volatile __bit PTR1;
|
|
__sfrbit(0x98,0x02) volatile __bit PTR2;
|
|
__sfrbit(0x98,0x03) volatile __bit PTR3;
|
|
__sfrbit(0x98,0x04) volatile __bit PTI0;
|
|
__sfrbit(0x98,0x05) volatile __bit PTI1;
|
|
__sfrbit(0x98,0x06) volatile __bit PTI2;
|
|
__sfrbit(0x98,0x07) volatile __bit PTI3;
|
|
__sfrbit(0x98,0x08) volatile __bit PIE0;
|
|
__sfrbit(0x98,0x09) volatile __bit PIE1;
|
|
__sfrbit(0x98,0x0A) volatile __bit PIE2;
|
|
__sfrbit(0x98,0x0B) volatile __bit PIE3;
|
|
__sfrbit(0x98,0x0C) volatile __bit PIR0;
|
|
__sfrbit(0x98,0x0D) volatile __bit PIR1;
|
|
__sfrbit(0x98,0x0E) volatile __bit PIR2;
|
|
__sfrbit(0x98,0x0F) volatile __bit PIR3;
|
|
__sfr(0x99) volatile unsigned int PWMCON1;
|
|
__sfrbit(0x99,0x00) volatile __bit PEN0;
|
|
__sfrbit(0x99,0x01) volatile __bit PEN1;
|
|
__sfrbit(0x99,0x02) volatile __bit PEN2;
|
|
__sfrbit(0x99,0x03) volatile __bit PEN3;
|
|
__sfrbit(0x99,0x04) volatile __bit PM0;
|
|
__sfrbit(0x99,0x05) volatile __bit PM1;
|
|
__sfrbit(0x99,0x06) volatile __bit PM2;
|
|
__sfrbit(0x99,0x07) volatile __bit PM3;
|
|
__sfrbit(0x99,0x0C) volatile __bit PB01;
|
|
__sfrbit(0x99,0x0E) volatile __bit PS2;
|
|
__sfrbit(0x99,0x0F) volatile __bit PS3;
|
|
__sfr(0xA0) volatile unsigned int T2CON;
|
|
__sfrbit(0xA0,0x06) volatile __bit T2R;
|
|
__sfrbit(0xA0,0x07) volatile __bit T2UD;
|
|
__sfrbit(0xA0,0x08) volatile __bit T2UDE;
|
|
__sfr(0xA1) volatile unsigned int T3CON;
|
|
__sfrbit(0xA1,0x06) volatile __bit T3R;
|
|
__sfrbit(0xA1,0x07) volatile __bit T3UD;
|
|
__sfrbit(0xA1,0x08) volatile __bit T3UDE;
|
|
__sfrbit(0xA1,0x09) volatile __bit T3OE;
|
|
__sfrbit(0xA1,0x0A) volatile __bit T3OTL;
|
|
__sfr(0xA2) volatile unsigned int T4CON;
|
|
__sfrbit(0xA2,0x06) volatile __bit T4R;
|
|
__sfrbit(0xA2,0x07) volatile __bit T4UD;
|
|
__sfrbit(0xA2,0x08) volatile __bit T4UDE;
|
|
__sfr(0xA3) volatile unsigned int T5CON;
|
|
__sfrbit(0xA3,0x06) volatile __bit T5R;
|
|
__sfrbit(0xA3,0x07) volatile __bit T5UD;
|
|
__sfrbit(0xA3,0x08) volatile __bit T5UDE;
|
|
__sfrbit(0xA3,0x09) volatile __bit CT3;
|
|
__sfrbit(0xA3,0x0E) volatile __bit T5CLR;
|
|
__sfrbit(0xA3,0x0F) volatile __bit T5SC;
|
|
__sfr(0xA4) volatile unsigned int T6CON;
|
|
__sfrbit(0xA4,0x06) volatile __bit T6R;
|
|
__sfrbit(0xA4,0x07) volatile __bit T6UD;
|
|
__sfrbit(0xA4,0x08) volatile __bit T6UDE;
|
|
__sfrbit(0xA4,0x09) volatile __bit T6OE;
|
|
__sfrbit(0xA4,0x0A) volatile __bit T6OTL;
|
|
__sfrbit(0xA4,0x0F) volatile __bit T6SR;
|
|
__sfr(0xA8) volatile unsigned int T01CON;
|
|
__sfrbit(0xA8,0x03) volatile __bit T0M;
|
|
__sfrbit(0xA8,0x06) volatile __bit T0R;
|
|
__sfrbit(0xA8,0x0B) volatile __bit T1M;
|
|
__sfrbit(0xA8,0x0E) volatile __bit T1R;
|
|
__sfr(0xA9) volatile unsigned int CCM0;
|
|
__sfrbit(0xA9,0x03) volatile __bit ACC0;
|
|
__sfrbit(0xA9,0x07) volatile __bit ACC1;
|
|
__sfrbit(0xA9,0x0B) volatile __bit ACC2;
|
|
__sfrbit(0xA9,0x0F) volatile __bit ACC3;
|
|
__sfr(0xAA) volatile unsigned int CCM1;
|
|
__sfrbit(0xAA,0x03) volatile __bit ACC4;
|
|
__sfrbit(0xAA,0x07) volatile __bit ACC5;
|
|
__sfrbit(0xAA,0x0B) volatile __bit ACC6;
|
|
__sfrbit(0xAA,0x0F) volatile __bit ACC7;
|
|
__sfr(0xAB) volatile unsigned int CCM2;
|
|
__sfrbit(0xAB,0x03) volatile __bit ACC8;
|
|
__sfrbit(0xAB,0x07) volatile __bit ACC9;
|
|
__sfrbit(0xAB,0x0B) volatile __bit ACC10;
|
|
__sfrbit(0xAB,0x0F) volatile __bit ACC11;
|
|
__sfr(0xAC) volatile unsigned int CCM3;
|
|
__sfrbit(0xAC,0x03) volatile __bit ACC12;
|
|
__sfrbit(0xAC,0x07) volatile __bit ACC13;
|
|
__sfrbit(0xAC,0x0B) volatile __bit ACC14;
|
|
__sfrbit(0xAC,0x0F) volatile __bit ACC15;
|
|
__sfr(0xB0) volatile unsigned int T2IC;
|
|
__sfrbit(0xB0,0x06) volatile __bit T2IE;
|
|
__sfrbit(0xB0,0x07) volatile __bit T2IR;
|
|
__sfr(0xB1) volatile unsigned int T3IC;
|
|
__sfrbit(0xB1,0x06) volatile __bit T3IE;
|
|
__sfrbit(0xB1,0x07) volatile __bit T3IR;
|
|
__sfr(0xB2) volatile unsigned int T4IC;
|
|
__sfrbit(0xB2,0x06) volatile __bit T4IE;
|
|
__sfrbit(0xB2,0x07) volatile __bit T5IR;
|
|
__sfr(0xB3) volatile unsigned int T5IC;
|
|
__sfrbit(0xB3,0x06) volatile __bit T5IE;
|
|
__sfrbit(0xB3,0x07) volatile __bit T5IR;
|
|
__sfr(0xB4) volatile unsigned int T6IC;
|
|
__sfrbit(0xB4,0x06) volatile __bit T6IE;
|
|
__sfrbit(0xB4,0x07) volatile __bit T6IR;
|
|
__sfr(0xB5) volatile unsigned int CRIC;
|
|
__sfrbit(0xB5,0x06) volatile __bit CRIE;
|
|
__sfrbit(0xB5,0x07) volatile __bit CRIR;
|
|
__sfr(0xB6) volatile unsigned int S0TIC;
|
|
__sfrbit(0xB6,0x06) volatile __bit S0TIE;
|
|
__sfrbit(0xB6,0x07) volatile __bit S0TIR;
|
|
__sfr(0xB7) volatile unsigned int S0RIC;
|
|
__sfrbit(0xB7,0x06) volatile __bit S0RIE;
|
|
__sfrbit(0xB7,0x07) volatile __bit S0RIR;
|
|
__sfr(0xB8) volatile unsigned int S0EIC;
|
|
__sfrbit(0xB8,0x06) volatile __bit S0EIE;
|
|
__sfrbit(0xB8,0x07) volatile __bit S0EIR;
|
|
__sfr(0xB9) volatile unsigned int SSCTIC;
|
|
__sfrbit(0xB9,0x06) volatile __bit SSCTIE;
|
|
__sfrbit(0xB9,0x07) volatile __bit SSCTIR;
|
|
__sfr(0xBA) volatile unsigned int SSCRIC;
|
|
__sfrbit(0xBA,0x06) volatile __bit SSCRIE;
|
|
__sfrbit(0xBA,0x07) volatile __bit SSCRIR;
|
|
__sfr(0xBB) volatile unsigned int SSCEIC;
|
|
__sfrbit(0xBB,0x06) volatile __bit SSCEIE;
|
|
__sfrbit(0xBB,0x07) volatile __bit SSCEIR;
|
|
__sfr(0xBC) volatile unsigned int CC0IC;
|
|
__sfrbit(0xBC,0x06) volatile __bit CC0IE;
|
|
__sfrbit(0xBC,0x07) volatile __bit CC0IR;
|
|
__sfr(0xBD) volatile unsigned int CC1IC;
|
|
__sfrbit(0xBD,0x06) volatile __bit CC1IE;
|
|
__sfrbit(0xBD,0x07) volatile __bit CC1IR;
|
|
__sfr(0xBE) volatile unsigned int CC2IC;
|
|
__sfrbit(0xBE,0x06) volatile __bit CC2IE;
|
|
__sfrbit(0xBE,0x07) volatile __bit CC2IR;
|
|
__sfr(0xBF) volatile unsigned int CC3IC;
|
|
__sfrbit(0xBF,0x06) volatile __bit CC3IE;
|
|
__sfrbit(0xBF,0x07) volatile __bit CC3IR;
|
|
__sfr(0xC0) volatile unsigned int CC4IC;
|
|
__sfrbit(0xC0,0x06) volatile __bit CC4IE;
|
|
__sfrbit(0xC0,0x07) volatile __bit CC4IR;
|
|
__sfr(0xC1) volatile unsigned int CC5IC;
|
|
__sfrbit(0xC1,0x06) volatile __bit CC5IE;
|
|
__sfrbit(0xC1,0x07) volatile __bit CC5IR;
|
|
__sfr(0xC2) volatile unsigned int CC6IC;
|
|
__sfrbit(0xC2,0x06) volatile __bit CC6IE;
|
|
__sfrbit(0xC2,0x07) volatile __bit CC6IR;
|
|
__sfr(0xC3) volatile unsigned int CC7IC;
|
|
__sfrbit(0xC3,0x06) volatile __bit CC7IE;
|
|
__sfrbit(0xC3,0x07) volatile __bit CC7IR;
|
|
__sfr(0xC4) volatile unsigned int CC8IC;
|
|
__sfrbit(0xC4,0x06) volatile __bit CC8IE;
|
|
__sfrbit(0xC4,0x07) volatile __bit CC8IR;
|
|
__sfr(0xC5) volatile unsigned int CC9IC;
|
|
__sfrbit(0xC5,0x06) volatile __bit CC9IE;
|
|
__sfrbit(0xC5,0x07) volatile __bit CC9IR;
|
|
__sfr(0xC6) volatile unsigned int CC10IC;
|
|
__sfrbit(0xC6,0x06) volatile __bit CC10IE;
|
|
__sfrbit(0xC6,0x07) volatile __bit CC10IR;
|
|
__sfr(0xC7) volatile unsigned int CC11IC;
|
|
__sfrbit(0xC7,0x06) volatile __bit CC11IE;
|
|
__sfrbit(0xC7,0x07) volatile __bit CC11IR;
|
|
__sfr(0xC8) volatile unsigned int CC12IC;
|
|
__sfrbit(0xC8,0x06) volatile __bit CC12IE;
|
|
__sfrbit(0xC8,0x07) volatile __bit CC12IR;
|
|
__sfr(0xC9) volatile unsigned int CC13IC;
|
|
__sfrbit(0xC9,0x06) volatile __bit CC13IE;
|
|
__sfrbit(0xC9,0x07) volatile __bit CC13IR;
|
|
__sfr(0xCA) volatile unsigned int CC14IC;
|
|
__sfrbit(0xCA,0x06) volatile __bit CC14IE;
|
|
__sfrbit(0xCA,0x07) volatile __bit CC14IR;
|
|
__sfr(0xCB) volatile unsigned int CC15IC;
|
|
__sfrbit(0xCB,0x06) volatile __bit CC15IE;
|
|
__sfrbit(0xCB,0x07) volatile __bit CC15IR;
|
|
__sfr(0xCC) volatile unsigned int ADCIC;
|
|
__sfrbit(0xCC,0x06) volatile __bit ADCIE;
|
|
__sfrbit(0xCC,0x07) volatile __bit ADCIR;
|
|
__sfr(0xCD) volatile unsigned int ADEIC;
|
|
__sfrbit(0xCD,0x06) volatile __bit ADEIE;
|
|
__sfrbit(0xCD,0x07) volatile __bit ADEIR;
|
|
__sfr(0xCE) volatile unsigned int T0IC;
|
|
__sfrbit(0xCE,0x06) volatile __bit T0IE;
|
|
__sfrbit(0xCE,0x07) volatile __bit T0IR;
|
|
__sfr(0xCF) volatile unsigned int T1IC;
|
|
__sfrbit(0xCF,0x06) volatile __bit T1IE;
|
|
__sfrbit(0xCF,0x07) volatile __bit T1IR;
|
|
__sfr(0xD0) volatile unsigned int ADCON;
|
|
__sfrbit(0xD0,0x07) volatile __bit ADST;
|
|
__sfrbit(0xD0,0x08) volatile __bit ADBSY;
|
|
__sfrbit(0xD0,0x09) volatile __bit ADWR;
|
|
__sfrbit(0xD0,0x0A) volatile __bit ADCIN;
|
|
__sfrbit(0xD0,0x0B) volatile __bit ADCRQ;
|
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__sfr(0xD1) volatile unsigned int P5;
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__sfr(0xD2) volatile unsigned int P5DIDIS;
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__sfr(0xD6) volatile unsigned int TFR;
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__sfrbit(0xD6,0x00) volatile __bit ILLBUS;
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__sfrbit(0xD6,0x01) volatile __bit ILLINA;
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__sfrbit(0xD6,0x02) volatile __bit ILLOPA;
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__sfrbit(0xD6,0x03) volatile __bit PRTFLT;
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__sfrbit(0xD6,0x06) volatile __bit MACTRP;
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__sfrbit(0xD6,0x07) volatile __bit UNDOPC;
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__sfrbit(0xD6,0x0D) volatile __bit STKUF;
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__sfrbit(0xD6,0x0E) volatile __bit STKOF;
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__sfrbit(0xD6,0x0F) volatile __bit NMI;
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__sfr(0xD7) volatile unsigned int WDTCON;
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__sfrbit(0xD7,0x00) volatile __bit WDTIN;
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__sfrbit(0xD7,0x01) volatile __bit WDTR;
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__sfrbit(0xD7,0x02) volatile __bit SWR;
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__sfrbit(0xD7,0x03) volatile __bit SHWR;
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__sfrbit(0xD7,0x04) volatile __bit LHWR;
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__sfrbit(0xD7,0x05) volatile __bit PONR;
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__sfr(0xD8) volatile unsigned int S0CON;
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__sfrbit(0xD8,0x03) volatile __bit S0STP;
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__sfrbit(0xD8,0x04) volatile __bit S0REN;
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__sfrbit(0xD8,0x05) volatile __bit S0PEN;
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__sfrbit(0xD8,0x06) volatile __bit S0FEN;
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__sfrbit(0xD8,0x07) volatile __bit S0OEN;
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__sfrbit(0xD8,0x08) volatile __bit S0PE;
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__sfrbit(0xD8,0x09) volatile __bit S0FE;
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__sfrbit(0xD8,0x0A) volatile __bit S0OE;
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__sfrbit(0xD8,0x0C) volatile __bit S0ODD;
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__sfrbit(0xD8,0x0D) volatile __bit S0BRS;
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__sfrbit(0xD8,0x0E) volatile __bit S0LB;
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__sfrbit(0xD8,0x0F) volatile __bit S0R;
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__sfr(0xD9) volatile unsigned int SSCCON;
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__sfrbit(0xD9,0x04) volatile __bit SSCHB;
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__sfrbit(0xD9,0x05) volatile __bit SSCPH;
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__sfrbit(0xD9,0x06) volatile __bit SSCPO;
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__sfrbit(0xD9,0x08) volatile __bit SSCTEN;
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__sfrbit(0xD9,0x08) volatile __bit SSCTE;
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__sfrbit(0xD9,0x09) volatile __bit SSCREN;
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__sfrbit(0xD9,0x09) volatile __bit SSCRE;
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__sfrbit(0xD9,0x0A) volatile __bit SSCPEN;
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__sfrbit(0xD9,0x0A) volatile __bit SSCPE;
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__sfrbit(0xD9,0x0B) volatile __bit SSCBEN;
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__sfrbit(0xD9,0x0B) volatile __bit SSCBE;
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__sfrbit(0xD9,0x0C) volatile __bit SSCAREN;
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__sfrbit(0xD9,0x0C) volatile __bit SSCBSY;
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__sfrbit(0xD9,0x0E) volatile __bit SSCMS;
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__sfrbit(0xD9,0x0F) volatile __bit SSCEN;
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__sfr(0xE0) volatile unsigned int P2;
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__sfr(0xE1) volatile unsigned int DP2;
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__sfr(0xE2) volatile unsigned int P3;
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__sfr(0xE3) volatile unsigned int DP3;
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__sfr(0xE4) volatile unsigned int P4;
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__sfr(0xE5) volatile unsigned int DP4;
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__sfr(0xE6) volatile unsigned int P6;
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__sfr(0xE7) volatile unsigned int DP6;
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__sfr(0xE8) volatile unsigned int P7;
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__sfr(0xE9) volatile unsigned int DP7;
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__sfr(0xEA) volatile unsigned int P8;
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__sfr(0xEB) volatile unsigned int DP8;
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__sfr(0xED) volatile unsigned int MRW;
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__sfr(0xEE) volatile unsigned int MCW;
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__sfrbit(0xEE,0x09) volatile __bit MCWMS;
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__sfrbit(0xEE,0x0A) volatile __bit MCWMP;
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__sfrbit(0xEE,0x0B) volatile __bit MCWCM;
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__sfrbit(0xEE,0x0C) volatile __bit MCWVM;
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__sfrbit(0xEE,0x0D) volatile __bit MCWEM;
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__sfrbit(0xEE,0x0E) volatile __bit MCWLM;
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__sfrbit(0xEE,0x0F) volatile __bit MIE;
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__sfr(0xEF) volatile unsigned int MSW;
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__sfrbit(0xEF,0x08) volatile __bit MSWN;
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__sfrbit(0xEF,0x09) volatile __bit MSWZ;
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__sfrbit(0xEF,0x0A) volatile __bit MSWC;
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__sfrbit(0xEF,0x0B) volatile __bit MSWSV;
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__sfrbit(0xEF,0x0C) volatile __bit MSWE;
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__sfrbit(0xEF,0x0D) volatile __bit MSWSL;
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__sfrbit(0xEF,0x0F) volatile __bit MIR;
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#endif
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